CONTRACT MDA 904­97­C­0298

1. INTRODUCTION

This report documents the work of Texas Instruments and DSPCon to implement the

new 2.4 kb/s Federal Standard Mixed Excitation Linear Predictive (MELP) vocoder in

fixed­point C and TMS320C50 assembly code. This MELP coder, selected in 1996 based

on an open competition, was jointly developed by TI and Atlanta Signal Processors, Inc.

and provides much higher speech quality than the earlier Standard LPC­10 at the same

low data rate. The goal of this project was to develop a version of the MELP coder using

16/32 bit arithmetic typical of a standard Digital Signal Processor (DSP) with equivalent

subjective speech quality to the original floating­point coder, and to implement a bit­exact

version of this software to run in real­time on the TMS320C50 DSP.

The fixed­point version of the MELP coder was developed in the C language using a

standard software library to simulate DSP arithmetic. This library, originally developed

for the European Telecommunications Standards Institute (ETSI), defines a minimum

functionality typical of all modern DSP devices and therefore allows straightforward

porting of the MELP coder to a wide range of DSP's. The fixed­point C MELP coder

was then extensively tested to verify that it met the performance goal of equivalence to

the floating­point version, and the resulting processed speech files were archived.

Finally, the TMS320C50 assembly software was developed from the fixed­point C

simulation, and it was verified that the resulting assembly code implementation produced

output identical (i.e., bit­exact) to the C simulation for all of the source files included in

the subjective testing.

In this report, Section 2 gives an overview of the MELP coder, the processing steps

involved in analysis and synthesis, and the transmission format. A description of the

fixed­point C software and listening test results follows in Section 3 . Finally, Section 4

describes the TMS320C50 assembly code development and results.